Active Transcoding
High Performance Team #5 Demo

Javed I. Khan

ACTIVENET Demo DEC 2000

Atlanta

Networking and Media Communications Research Lab

Dept of Math & Computer Science

Kent State University

Sponsor: DARPA/ITO

MPEG-2 Transcoding

The digital video standard for DTV/HDTV.

Compression performance for high-end video

Combines co-efficient transform+predictive coding+ motion estimation.

Extremely computation intensive:

Current state-of-the art in video compression technology requires custom chipset to obtain real-time performance in MPEG-2 encoding.

Roughly speaking, something close to CIF video (CCIR 4:2:0 CIF=352x240 at 30 frames/second or 352 x288 at 25 frames/second) can be decoded in software satisfactorily. It requires processing of 69,300 blocks per second.

In comparison, a broadcast quality video (CIR-601 4:2:2: 720x480 at 30 frames/second or 352x576 at 25 frames/second) requires processing of 405,000 blocks per second.

a production or medical quality video (MPEG-2 HIGH@HIGH-1440 profile=1920x1152x 60 frames/second) will require processing of 5,184,000 blocks per second.

A full logic xcoder is encoder+decoder!

3 Way Tradeoff

Adaptation Services

Link Capacity Adaptation

splices wide-band links with low capacity links.

application aware rate adaptation

greater down-scalability range (4/5th vs. 1/100th)

Perceptual encoding

Much sophisticated perceptual control over where and how quality is compromised

Node Capacity Adaptation

allows network junction nodes with unequal CPUs to perform rate adaptation.

auto-configuration by motion vector bypass

Reuses motion vector and saves computation for quality

Cycle sweeping (network spread)

If one node is not enough it spreads the computation upstream and sweeps additional cycles from active nodes.

Application Level Adaptation:
Active Transcoding

RATE
SCALABILITY

Full Cascade Adaptation

MPEG-2 Rate Control

Slide 10

REGION OF INTEREST
ADAPTATION

ROI Encoding (Uniform)

ROI Encoding (Focus)

Slide 14

Slide 15

SELF-CONFIGURATION

Resource Impact

Active Node CPU Cycle

Parameter bypass

DCT domain transcoding

MV optimization

Memory

I,P,B frame buffer

Instruction foot-print

Disk Access

GOP buffer

Auxiliary data storage

Time Profile on PIII-450MHz

Xcoder States

Motion Vector Bypass

3-way Tradeoff

CYCLE
SWEEPING

Active Netwide Computing

Flow: “Single Stream Multiple Form”

Mapping

MPEG-2 DEMO

Today’s Demo

Link Capacity Adaptation

splices wide-band links with low capacity links.

application aware rate adaptation

greater down-scalability range (4/5th vs. 1/100th)

perceptual encoding

Much sophisticated perceptual control over where and how quality is compromised

Node Capacity Adaptation

allows network junction nodes with unequal CPUs to perform rate adaptation.

auto-configuration by motion vector bypass

Reuses motion vector and saves computation for quality

Cycle sweeping (network spread)

If one node is not enough it spreads the computation upstream and sweeps additional cycles from active nodes.

Parallel XCoding

Adaptive MPEG-2 XCoding

Comments on Performance

Self-reconfiguration signaling

At any given time, there will be nodes with unequal capacities. It will be critical to build self-configuring middle box which can withstand the variation. Self-reconfiguration signaling can be permanent part.

Cycle sweep technology

Sweeping cycles from active network neighborhood will be one of the key means for real-time stream processing. Support should be built in any realistic ANET architecture.

FPGA (architecture+ application level)

Atleast some high performance ANET router should have more esoteric mean for booting application performance.

Comments on Systems Engineering

Multiprocessing & multithread capsules

Few node OS/EE seems to lack support for complex application execution model. But, our experience is that for the middle-box model, such models are indispensable (MPEG-2 decode/ reencode threads)

Event driven model?

Few OS/EE have been modeled as 100% event driven model. However, a mixed model perhaps is desirable. After all a continuous data stream can cause havoc in performance in event driven I/O.

Cost of structural conversion?

Have active network community thought about legacy applications? ANTS and few others requires middle-box to cast in a specific program forma. It will be nice to have an automatic tool which will reengineer a middle box written in legacy forma to that forma.

Team

From front left (anti-clockwise):

Wansik, Yang, Darsan, Zhong, Oleg & Patrck,

missing: Gu, and Sharif


	Javed I. Khan

	ACTIVENET Demo DEC 2000
	Atlanta

	Networking and Media Communications Research Lab
	Dept of Math & Computer Science
	Kent State University

	Sponsor: DARPA/ITO


The digital video standard for DTV/HDTV.
	Compression performance for high-end video
	Combines co-efficient transform+predictive coding+ motion estimation.
Extremely computation intensive:
	Current state-of-the art in video compression technology requires custom chipset to obtain real-time performance in MPEG-2 encoding.
		Roughly speaking, something close to CIF video (CCIR 4:2:0 CIF=352x240 at 30 frames/second or 352 x288 at 25 frames/second) can be decoded in software satisfactorily. It requires processing of 69,300 blocks per second.
		In comparison, a broadcast quality video (CIR-601 4:2:2: 720x480 at 30 frames/second or 352x576 at 25 frames/second) requires processing of 405,000 blocks per second.
		a production or medical quality video (MPEG-2 HIGH@HIGH-1440 profile=1920x1152x 60 frames/second) will require processing of 5,184,000 blocks per second.

	A full logic xcoder is encoder+decoder!


Link Capacity Adaptation
	splices wide-band links with low capacity links.
	application aware rate adaptation
		greater down-scalability range (4/5th vs. 1/100th)
	Perceptual encoding
		Much sophisticated perceptual control over where and how quality is compromised

Node Capacity Adaptation
	allows network junction nodes with unequal CPUs to perform rate adaptation.
	auto-configuration by motion vector bypass
		Reuses motion vector and saves computation for quality
	Cycle sweeping (network spread)
		If one node is not enough it spreads the computation upstream and sweeps additional cycles from active nodes.


	Active Node CPU Cycle
		Parameter bypass
		DCT domain transcoding
		MV optimization

	Memory
		I,P,B frame buffer
		Instruction foot-print

	Disk Access
		GOP buffer
		Auxiliary data storage


	Self-reconfiguration signaling
		At any given time, there will be nodes with unequal capacities. It will be critical to build self-configuring middle box which can withstand the variation. Self-reconfiguration signaling can be permanent part.
	Cycle sweep technology
		Sweeping cycles from active network neighborhood will be one of the key means for real-time stream processing. Support should be built in any realistic ANET architecture.
	FPGA (architecture+ application level)
		Atleast some high performance ANET router should have more esoteric mean for booting application performance.


	Multiprocessing & multithread capsules
		Few node OS/EE seems to lack support for complex application execution model. But, our experience is that for the middle-box model, such models are indispensable (MPEG-2 decode/ reencode threads)
	Event driven model?
		Few OS/EE have been modeled as 100% event driven model. However, a mixed model perhaps is desirable. After all a continuous data stream can cause havoc in performance in event driven I/O.
	Cost of structural conversion?
		Have active network community thought about legacy applications? ANTS and few others requires middle-box to cast in a specific program forma. It will be nice to have an automatic tool which will reengineer a middle box written in legacy forma to that forma.


	From front left (anti-clockwise):
	Wansik, Yang, Darsan, Zhong, Oleg & Patrck,
	missing: Gu, and Sharif